Input/Output Ports
| Port | Output | Function | Input | Function |
|---|---|---|---|---|
| 0H | COL0R | Color Register 0 (Right) | ||
| 1H | COL1R | Color Register 1 | ||
| 2H | COL2R | Color Register 2 | ||
| 3H | COL3R | Color Register 3 | ||
| 4H | COL0L | Color Register 0 (Left) | ||
| 5H | COL1L | Color Register 1 | ||
| 6H | COL2L | Color Register 2 | ||
| 7H | COL3L | Color Register 3 | ||
| 8H | CONCM | Consumer/Commercial mode | INTST | Intercept Status Feedback |
| 9H | HORCB | Frame color, Horizontal Color Boundary | ||
| AH | VERBL | Vertical Blanking Line | ||
| BH | COLBX | Color Block Transfer | ||
| CH | MAGIC | Magic Register | ||
| DH | INFBK | Interrupt Feedback | ||
| EH | INMOD | Interrupt Enable and Mode | VERAF | Vertical Address Feedback |
| FH | INLIN | Interrupt Line | HORAF | Horizontal Address Feedback |
| 10H | TONMO | Tone Master Oscillator | SW0 | Player 1 Control Handle |
| 11H | TONEA | Tone A Frequency | SW1 | Player 2 Control Handle |
| 12H | TONEB | Tone B Frequency | SW2 | Player 3 Control Handle |
| 13H | TONEC | Tone C Frequency | SW3 | Player 4 Control Handle |
| 14H | VIBRA | Vibrato Speed/Depth | KEY0 | Keypad Column 0 (right) |
| 15H | VOLC | Modulation Type (Noise/Vibrato), Tone C Volume | KEY1 | Keypad Column 1 |
| 16H | VOLAB | Tone B Volume, Tone A Volume | KEY2 | Keypad Column 2 |
| 17H | VOLN | Noise Volume | KEY3 | Keypad Column 3 (left) |
| 18H | SNDBX | Sound Block Transfer | ||
| 19H | XPAND | Expander Pixel Definition | ||
| 1CH | POT0 | Player 0 Pot | ||
| 1DH | POT1 | Player 1 Pot | ||
| 1EH | POT2 | Player 2 Pot | ||
| 1FH | POT3 | Player 3 Pot |
Port Descriptions
Currently incomplete
COL0R, 1R, 2R, 3R ($0–$3)
These registers define the color (bits 3–7) and brightness (bits 0–2) of pixels that are to the right of the color boundary as defined by the register at I/O address $9.
COL0L, 1L, 2L, 3L ($4–$7)
These registers define the color (bits 3–7) and brightness (bits 0–2) of pixels that are to the left of the color boundary as defined by the register at I/O address $9.
CONCM ($8)
Select video mode (0 = low res 160×102, 1 = high res 320×204).
HORCB ($9)
VERBL ($A)
Vertical Blank. The Address chip needs this register to determine the scan line below which Screen Refresh is no longer needed. The Data chip must duplicate this register to determine when to turn on the border color.
COLBX ($B)
A block transfer to this register will load Color registers 7 through 0 (in that order) with the data written to this address.
MAGIC ($C)
INFBK ($D)
Interrupt feedback register. Upon interrupt acknowledge by the Z80, the previously-written contents of this register are driven back to the Z80 through the microcycle bus.
INMOD / VERAF ($E)
Interrupt Enable and Mode/Vertical Line Feedback. On write, this register enables interrupts and determines the interrupt mode of each. On read, this register contains the vertical line number that a Light Pen Interrupt was received on. Bit 3 of the Interrupt Enable port (0EH) when set enables line interrupts, while bit 1 of the same register enables the Light Pen interrupt.
INLIN / HORAF ($F)
Interrupt Line/Horizontal Address Feedback. On write, this register sets the scan line number on which to generate a line interrupt back to the Z80. On read, this register contains the horizontal address (i.e., position in the line) that a Light Pen Interrupt was received on.
TONMO / SW0 ($10)
TONMO is the “tone” (i.e., frequency) of the master oscillator.
SW0
