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hardware:magic_system [2016/06/01 16:05]
ex_writer created
hardware:magic_system [2016/06/11 12:35] (current)
ex_writer [Example: Space Invaders]
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 ====== Magic System ====== ====== Magic System ======
  
-The Magic System is enabled when data is written to a memory location between 0 to 16K ($0–$3FFF),​ aka Magic Memory. Since this memory range is occupied by [[system ROM]] and [[cartridges|cartridge ROM]], respectively,​ data cannot be written to this area. Instead, a modified form of the data is actually written to memory location X + 16K.  +The Magic System is enabled when data is written to a memory location between 0 to 16K ($0–$3FFF),​ aka Magic Memory. Since this memory range is occupied by [[software:system ROM]] and [[software:cartridges|cartridge ROM]], respectively,​ data cannot be written to this area. Instead, a modified form of the data is actually written to memory location X + 16K. The Magic function generator uses a pair of registers, MAGIC ($C) and XPAND ($19), to perform the requested transformations.
 ===== Magic Register ===== ===== Magic Register =====
  
-The Magic Register ([[output port]] $C) byte determines how the data is modified. Each bit flags a specific data transformation. The purpose of each Magic Register bit is shown below:+The Magic Register ([[i o ports|output port]] $C) byte determines how the data is modified. Each bit flags a specific data transformation. The purpose of each Magic Register bit is shown below:
  
 ^ Bit ^ Function ^ Description ^ ^ Bit ^ Function ^ Description ^
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 As many as four functions can be used at any one time, and any function can be bypassed. OR and XOR cannot be done at the same time. As many as four functions can be used at any one time, and any function can be bypassed. OR and XOR cannot be done at the same time.
  
-**NOTE:​** ​Rotation is not supported on the Bally Arcade. For more details, consult the Nutting Manual pp. 98–99.+<WRAP info>Rotation is not supported on the Bally Arcade. For more details, consult the Nutting Manual pp. 98–99.</​WRAP>​
 ==== Expander ==== ==== Expander ====
  
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 During each memory write instruction using the expander, either the upper half or the lower half of the data bus is expanded. The half used is determined by the expand flip-flop. The flip-flop is reset by an output to the magic register and is toggled after each Magic Memory write. The upper half of the data bus is expanded when the flip-flop is 0, and the lower half when the flip-flop is 1. During each memory write instruction using the expander, either the upper half or the lower half of the data bus is expanded. The half used is determined by the expand flip-flop. The flip-flop is reset by an output to the magic register and is toggled after each Magic Memory write. The upper half of the data bus is expanded when the flip-flop is 0, and the lower half when the flip-flop is 1.
  
-The expand register ([[output port]] $19) determines the pixel values into which the data bus will be expanded. A 0 on the data bus will be expanded into the pixel defined by bits 0 and 1 of the expand register. A 1 on the data bus will be expanded into the pixel defined by bits 2 and 3 of the expand register.+The expand register ([[i o ports|output port]] $19) determines the pixel values into which the data bus will be expanded. A 0 on the data bus will be expanded into the pixel defined by bits 0 and 1 of the expand register. A 1 on the data bus will be expanded into the pixel defined by bits 2 and 3 of the expand register.
  
 The pixels generated by bit 0 or 4 of the data bus will be the least significant pixel of the expanded byte. The most significant pixel will come from bit 3 or 7. The pixels generated by bit 0 or 4 of the data bus will be the least significant pixel of the expanded byte. The most significant pixel will come from bit 3 or 7.
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 | 2 | Bits 2–3 define the color for 1 bits in the expanded pixel pattern | | 2 | Bits 2–3 define the color for 1 bits in the expanded pixel pattern |
 | 3 | 00 = color 0, 01 = color 1, 10 = color 2, 11 = color 3 | | 3 | 00 = color 0, 01 = color 1, 10 = color 2, 11 = color 3 |
-| 4 | Not used [?] | +| 47 | Not used |
-| 5 | Not used [?] | +
-| 6 | Not used [?] | +
-7 | Not used [?] |+
  
-Example:+ 
 +---- 
 + 
 +=== Example ​===
  
 <code z80> <code z80>
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 The diagram below shows examples of shifting and flopping. The diagram below shows examples of shifting and flopping.
  
-{{shifter_flopper.png}}+{{:shifter_flopper.png}}
  
  
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 === Intercept Register (Collision Detection) === === Intercept Register (Collision Detection) ===
  
-Software reads the intercept register ([[input port]] $8) to determine if an intercept occurred on an OR or XOR write. An intercept is defined as the writing of a non-zero pixel location that previously contained a non-zero pixel. A non-zero ​pixel is a pixel with a value of 01, 10, or 11. A 1 in the intercept register ​means an intercept has occurred. Bits 0–3 give the intercept information for all OR or XOR writes since the last input from the intercept register. An input from the intercept register resets these bits. A bit is set to 1 if an intercept occurs in the appropriate position and will not be reset until after the next intercept register input.+Software reads the intercept register ([[i o ports|input port]] $8) to determine if an intercept occurred on an OR or XOR write. An intercept is defined as the writing of a non-zero pixel (i.e., 01B, 10B, or 11B) location that previously contained a non-zero pixel. ​  
 + 
 +bit corresponding to the pixel position ​in the intercept register ​will be written to logical 1. Bits 0–3 give the intercept information for all OR or XOR writes since the last input from the intercept register. An input from the intercept register resets these bits. A bit is set to 1 if an intercept occurs in the appropriate position and will not be reset until after the next intercept register input.
  
 ^ Bit ^ Meaning ^ ^ Bit ^ Meaning ^
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 | 7 | Intercept in pixel 0 in last OR or XOR write | | 7 | Intercept in pixel 0 in last OR or XOR write |
  
 +From [[http://​www.ballyalley.com/​faqs/​BPA%20Video%20Hardware%20FAQ/​Bally_Professional_Arcade_Video_Hardware%20(2001)(Tony%20Miller).pdf|A Description of the Bally Professional Arcade Video Hardware]], p. 24:
  
-----+> "The Intercept register contains several flag bits which save the result of previous OR or XOR Magic Memory writes. If any of bits [3:0] are set, this indicates that the previous write to the corresponding pixel (bit[3] = pixel[3], etc.,) wrote a non-zero pixel with a non-zero value. Bits [3:0] track the last Magic memory write, while bits [7:4] track //any// write to the corresponding pixel (bit[7]=pixel[3],​etc.,​) since the last time the Intercept register was read. Thus, once any of bits [7:4] are set to logical 1, they will remain that way until the register is read, at which time these bits will be cleared to logical 0." 
 +=== Example: Space Invaders ===
  
-**Example:​** ​The Space Invaders (proto) disassembly shows that invader bullets are written with XOR in the Magic Register of their VWRITR call, so collisions are checked as follows:+The //Space Invaders// (proto) disassembly shows that invader bullets are written with XOR in the Magic Register of their VWRITR call, so collisions are checked as follows:
  
 <code z80> <code z80>
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 </​code>​ </​code>​
  
-Directly after the pattern write, intercept status is loaded in A, then A is ORed to see if any bits are set (indicating an intercept). If the OR result is 0, no collision occurs, and the collision check subroutine exits.+Directly after the pattern write, intercept status is loaded in A, then A is ORed to see if any bits are set (indicating an intercept). If the OR result is 0, no collision occurs, and the collision check subroutine exits. ​(//​Football//​ uses an identical check.)
  
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