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hardware [2016/05/22 18:10]
ex_writer [Light Pen Interrupt]
hardware [2016/06/05 15:33] (current)
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 The Bally Professional Arcade is a full-color videogame system based on the mass-RAM-buffer technique. A mass-RAM-buffer system is one in which one or more bits of RAM are used to define the color and intensity of a pixel on the screen. The picture on the screen is defined by the contents of RAM and can easily be changed by modifying RAM. The Bally Professional Arcade is a full-color videogame system based on the mass-RAM-buffer technique. A mass-RAM-buffer system is one in which one or more bits of RAM are used to define the color and intensity of a pixel on the screen. The picture on the screen is defined by the contents of RAM and can easily be changed by modifying RAM.
  
-The system uses a Z80 microprocessor as its main control unit. The system ROM has software for four games: Gunfight, Checkmate, Scribbling, and Calculator. Additional ROM can be accessed through the cartridge connector. Three [[custom chips]] control the video interface, special video processing functions, keyboard and control handle interface, and audio generation.+The system uses a Z80 microprocessor as its main control unit. The [[software:system ROM]] has software for four games: Gunfight, Checkmate, Scribbling, and Calculator. Additional ROM can be accessed through the cartridge connector. Three [[hardware:custom chips]] control the video interface, special video processing functions, keyboard and control handle interface, and audio generation.
  
-The system exists in both high-resolution and low-resolution models. The three [[custom chips]] can operate in either mode. The mode of operation is determined by bit 0 of output port 8H. It must be set to 0 for low-resolution and 1 for high-resolution. This bit is not set to 0 at power up and must be set by software before any RAM operations can be performed.+The system exists in both high-resolution and low-resolution models. The three custom chips can operate in either mode. The mode of operation is determined by bit 0 of [[hardware:​i o ports|output port]] 8H. It must be set to 0 for low-resolution and 1 for high-resolution. This bit is not set to 0 at power up and must be set by software before any RAM operations can be performed.
  
-**NOTE:** The Astrocade ​only has access to low-resolution output. High-resolution output was available in certain Bally arcade titles. Further references to the high-resolution mode are omitted. For further information about this mode, please consult the original Nutting Manual.+**NOTE:** The Bally Arcade ​only has access to low-resolution output. High-resolution output was available in certain Bally arcade titles. Further references to the high-resolution mode are omitted ​throughout the Better Bally Book. For further information about this mode, please consult the original Nutting Manual.
  
-===== Memory Map ===== 
  
-In both the lowand high-resolution models, the operating system ROM is in the first 8K of memory space. Cartridge ROM resides in memory between 8K to 16K. Standard screen RAM begins at 16K and occupies 4K bytes. Magic screen RAM begins at location 0. It is the same size as standard screen RAM. Memory space 20K–32K is available for expansion.+----
  
-When data is read from a memory location between 0–16K, ​the data come from ROM. When data is written in a memory location (X) between ​ 0–16K, the system actually writes a modified form of the data in location X+16K. The modification is performed by the [[Magic Memory|magic system]] in the Data Chip and Address Chip. Thus the RAM from 0 to 16K is called [[Magic Memory]].+Hardware ​is divided into the following subsections:​
  
-[NM:82]+  * [[hardware:​Memory Map]] 
 +  * [[hardware:​Screen Map]] 
 +  * [[hardware:​Color]] 
 +  * [[hardware:​Interrupts]] 
 +  * [[hardware:​Magic System]] 
 +  * [[hardware:​Player Input]] 
 +  * [[hardware:​Music Processor]] 
 +  * [[hardware:​i o ports|Input/​Output Ports]] 
 +  * [[hardware:​custom chips|Custom Chips]] 
 +  * [[hardware:expansion|Expansion]]
  
-===== Bally Arcade Memory Map =====+----
  
-{{low_memory_map.png}} +Image source: [[http://www.ballyalley.com|Bally Alley]]
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-[NM:83] +
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-===== Screen Map ===== +
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-In the Bally Professional Arcade, two bits of RAM define each screen pixel. Therefore, one 8-bit byte of RAM defines four pixels on the screen. +
- +
-In the low-resolution model, 40 bytes define a line of screen data, providing a horizontal resolution of 160 pixels. The vertical resolution is 102 lines. Therefore, the screen requires 102 x 40 = 4,080 bytes. The remaining 16 bytes of screen RAM are used for [[scratchpad]]. More RAM can be reserved for [[scratchpad]] by [[blanking]] the screen before the 102nd line.  +
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-[High-resolution explanation omitted.] +
- +
-The first byte of RAM is in the upper lefthand corner of the screen. As the RAM address increases, the screen position moves in the same direction as the TV scan—left-to-right and top-to-bottom. The four pixels in each byte are displayed with the least significant pixel, defined by bits 0 and 1, on the right. +
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-{{screen_map.png}} +
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-===== Color Mapping ===== +
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-Two bits represent each screen pixel. These two bits, along with the LEFT/RIGHT bit that is set by crossing the [[horizontal color boundary]], map each pixel to one of eight different color registers. The value in the color register defines the color and intensity of the pixel on the screen. The three least significant bits of the register define the pixel intensity—000 for darkest and 111 for lightest. The five most significant bits define the color. Color registers reside at [[output ports]] 0 through 7; register 0 at port 0, register 1 at port 1, etc. +
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-The color registers can be accessed as individual ports or all eight can be accessed by one OTIR instruction. The OTIR instruction is to port $B (register C) and register B should be set to 8. The eight bytes of data pointed to by HL will go to the color registers: +
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-[diagram] +
-==== Horizontal Color Boundary ==== +
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-The horizontal color boundary defines the horizontal position of an imaginary vertical line on the screen. The boundary line can be positioned between any two adjacent bytes. The line is immediately to the left of the byte whose number is sent to bits 0–5 of port 9. For example, if the horizontal color boundary is set to 0, the line will be just to the left of byte 0; if it is set to 20, the line will be between bytes 19 and 20 in the center of the screen. +
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-If a pixel is to the left of the boundary, its LEFT/RIGHT bit is set to 1. The LEFT/RIGHT bit is set to 0 for pixels to the right of the boundaryColor registers 0–3 are used for pixels to the right of the boundary and registers 4–7 are used for pixels to the left of the boundary. +
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-To put the entire screen, including the right side background, on the left side of the boundary, set the horizontal color boundary to 44. +
-==== Background Color ==== +
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-On most CRT televisions,​ the area defined by RAM is slightly smaller than the visible screen. In other words, there is generally extra space on all four sides of the RAM area. The color and intensity of this area is defined by the background color number (bits 6 and 7 of port 9). These two bits, along with the LEFT/RIGHT bit, point to one of the color registers that determines the background'​s color and intensity. +
-===== Vertical Blank ===== +
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-The Vertical Blank Register (output port $A) contains the line number where vertical blanking will begin. The register must be set to 101 or less. Bit 0 should be set to 0 and the line number should be in bits 1–7. The background color will display from the vertical blank line to the bottom of the screen. This allows the screen RAM that would normally be displayed in that area to be used for scratchpad. If the vertical blank register is set to 0, the entire RAM can be used for scratchpad. +
-===== Color Register Map ===== +
- +
-The color register map shows which color registers are used to define colors in different areas of the screen. The map assumes the background color is set to 0. If it were set to 1 then color registers 1 and 5 would be used for background instead of 0 and 4. The color boundary is between bytes X and X-1. +
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-{{color_register_map.png}} +
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-[NM:​85-91] +
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-===== Interrupt Feedback ===== +
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-When the Z80 acknowledges an interrupt, it reads 8 bits of data from the data bus. It then uses this data as an instruction or an address. In the Bally Professional Arcade, this data is determined by the contents of the interrupt feedback register (output port $D). In response to a screen interrupt, the contents of the interrupt feedback register are placed directly on the data bus. In response to a [[light pen]] interrupt, the lower four bits of the data bus are set to 0 and the upper four bits are the same as the corresponding bits of the feedback register. +
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-==== Interrupt Control Bits ==== +
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-In order for the Z80 to accept an interrupt, the internal interrupt enable flip-flop must be set by an EI instruction,​ and one or two of the external interrupt enable bits must be set (output port $E). If bit 1 is set, light pen interrupts can occur. If bit 3 is set, screen interrupts can occur. If both bits are set, both interrupts can occur, and the screen interrupt has higher priority. +
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-The interrupt mode bits determine what happens if an interrupt occurs when the Z80's interrupt enable flip-flop is not set. Each of the two interrupts may have a different mode. In mode 0, the Z80 will continue to be interrupted until it finally enables interrupts and acknowledges the interrupt. In mode 1, the interrupt will be discarded if it is not acknowledged by the next instruction after it occurred. If mode 1 is used, the software must be designed such that the system will not be executing certain Z80 instructions when the interrupt occurs. The opcodes of these instructions begin with CBH, DDH, EDH, and FDH. +
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-The mode bit for [[light pen]] interrupt is bit 0 of port $E, and the mode bit for screen interrupt is bit 2 of port $E. +
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-==== Screen Interrupt ==== +
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-The screen interrupt synchronizes the software with the video system. The software must send a line number to the interrupt line register (output port $F). To do so, bit 0 is set to 0 and the line number is sent to bits 1–7. If the screen interrupt enable bit is set, the Z80 will be interrupted when the video system completes scanning the line in the interrupt register. This interrupt can be used for timing, since each line is scanned 60 times per second. It can also be used in conjunction with the color registers to make as many as 256 color-intensity combinations appear on screen at the same time. +
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-==== Light Pen Interrupt ==== +
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-The [[light pen]] interrupt occurs when the light pen trigger is pressed and the video scan crosses the point on the screen where the light pen registers. The interrupt routine can read two registers to determine the position of the light pen. The line number is read from the vertical feedback register (input port $E). Bit 0 is ignored and bits 1–7 indicates the line number. The horizontal position of the light pen can be determined by reading input port $F and subtracting 8. The resultant value is the pixel number, 0 to 159. +
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-[NM:92-3]+