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output_port [2016/05/28 23:16] ex_writer [INMOD] |
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| - | ====== Output Ports ====== | ||
| - | ^ Port Number (hex) ^ Equate ^ Function ^ Notes ^ | ||
| - | | 0 | COL0R | Color Register 0 (Right) | | | ||
| - | | 1 | COL1R | Color Register 1 | | | ||
| - | | 2 | COL2R | Color Register 2 | | | ||
| - | | 3 | COL3R | Color Register 3 | | | ||
| - | | 4 | COL0L | Color Register 0 (Left) | | | ||
| - | | 5 | COL1L | Color Register 1 | | | ||
| - | | 6 | COL2L | Color Register 2 | | | ||
| - | | 7 | COL3L | Color Register 3 | | | ||
| - | | 8 | CONCM | Consumer/Commercial mode (i.e., low- or high-resolution) | Bally Arcade may only operate in consumer/low-resolution mode | | ||
| - | | 9 | HORCB | [[color mapping#horizontal color boundary|Horizontal Color Boundary]], [[color mapping#background color|BG Color]] | HCB (bits 0–6), BG (bits 6–7) | | ||
| - | | A | VERBL | Vertical Blank Register | # of vertical lines (x 2) to be used for screen update (c.f., [[screen handler#setout|SETOUT]]) | | ||
| - | | B | COLBX | Color Block Transfer || | ||
| - | | C | MAGIC | [[Magic Register]] || | ||
| - | | D | INFBK | Interrupt Feedback | | | ||
| - | | E | INMOD | Interrupt Enable and Mode | | | ||
| - | | F | INLIN | Interrupt Line || | ||
| - | | 10 | TONMO | Tone Master Oscillator || | ||
| - | | 11 | TONEA | Tone A Frequency || | ||
| - | | 12 | TONEB | Tone B Frequency || | ||
| - | | 13 | TONEC | Tone C Frequency || | ||
| - | | 14 | VIBRA | Vibrato/Tremolo || | ||
| - | | 15 | VOLAB |Tone C Volume, Noise Modulation Control || | ||
| - | | 16 | VOLC | Tone A Volume, Tone B Volume || | ||
| - | | 17 | VOLN | Noise Volume || | ||
| - | | 18 | SNDBX | Sound Block Transfer || | ||
| - | | 19 | XPAND | Expander Pixel Definition || | ||
| - | |||
| - | ===== Port Descriptions ===== | ||
| - | |||
| - | ==== INMOD ($E) ==== | ||
| - | |||
| - | Interrupt Enable and Mode/Vertical Line Feedback. On write, this register enables interrupts and determines the interrupt mode of each. On read, this register contains the vertical line number that a Light Pen Interrupt was received on (not used in WOW). Bit 3 of the Interrupt Enable port (0x0E) when set enables line interrupts, while bit 1 of the same register enables the Light Pen interrupt. | ||
| - | |||
| - | ==== Headline ($F) ==== | ||
| - | |||
| - | Interrupt Line/Horizontal Address Feedback. On write, this register sets the scan line number on which to generate a line interrupt back to the Z80. On read, this register contains the horizontal address (i.e., position in the line) that a Light Pen Interrupt was received on. | ||
| - | |||
| - | ---- | ||
| - | |||
| - | [NM:106, 143, source listing 5] | ||
| - | Reference: [[http://www.ballyalley.com/ml/ml_source/WOW_Latest_working_copy_of_full_disassembly_022104.asm|Wizard of Wor arcade disassembly]] | ||
